DFT Methodology Engineer

The Printer Products Group provides an exciting fast-paced environment where engineers design systems and ASICs for consumer products.  The person in this role will develop and implement DFT solutions for the Printer Business projects.

 

Responsibilities:

 

The candidate will be responsible for defining, verifying, and implementing design for test methodologies for the Printer Business which meets the needs of the design team, the customer, and the test generation team.  This includes tools and methods for memory BIST, internal scan and ATPG, JTAG, BIST for IP, etc.  Candidate responsibilities will also include supporting US and South East Asia design teams and test generation teams.

 

Requirement:

 

*Preferred 3 years experience in ASIC DFT implementation or support.
*Minimum of a BSEE/ECE or MSEE/ECE degree.
*Preferred experience with Mentor/Synopsys DFT or like tools.
*Preferred to be familiar with Debussy, Verilog and VCS/NCsim or like tools.
*Scripting language knowledge (perl, TCL, csh, etc?).

 

Please forward your resume to alice@marvell.com  with the job title in the subject line.