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Engineer, Staff Layout
| Details |
Country: USA
Location: CA Silicon Valley/San Jose
Total applied: 26
Job Type: Employee
Job Status: Full Time
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Engineer, Staff Layout
Marvell. Moving Forward Faster.
Marvell offers revolutionary devices that touch every point of the communications infrastructure: switching, transceivers, wireless, PC connectivity, communications controllers, and storage. Our continuous cycle of innovations has enabled Marvell to consistently deliver the industry?s gold standard, emerging as the market leader in virtually all of our product categories.
Position Description:
As a Staff level Mask Designer, you will be responsible for the layout of analog, digital, mix-signal circuits, power transistors, block level floor planning, DRC, LVS, top level Chip Integration, as well as the tape out activities. You will work with design engineers to ensure layout quality, and will have the responsibility to help organize and lead other mask designers in a team environment to complete a project on time. You will have the opportunity to establish new procedures and suggest methodologies that can improve efficiency and/or enhance work productivity.
To Apply Visit Marvell Semiconductor
Qualifications:
BS EE 7+ years of analog and mixed signal mask design and chip integration experience. Fundamental understanding of transistor level layout issues, particularly those related to CMOS, bipolar, and LDMOS structures. Familiar with industry standard layout editors, DRC and LVS. The winning candidate must be familiar with common analog layout techniques when dealing with such issues as latch ups, component matching, noise shielding, bussing, block placements, routing, antenna issues, etc. He/she must have good communication and problem solving skills, and exhibit potential leadership qualities. Experience in power management IC, or familiarity with outside foundries such as TSMC, is a plus but not a requirement.
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