Senior CAD Engineer

Job Responsibilities

 

The ideal candidate will be able to drive the definition and coordinate the hand-off methodology between the front-end design needs of the ASIC design group, the back-end design needs of the physical design group, and the analog design group

Candidate must implement the methodology with a CAD suite of scripts and other software tools to aid the analog design engineers and analog layout designers to support the production of those deliverables. The candidate will be responsible for customizing analog design flow and providing analog tool support for enhancing design productivity, LVS and ERC deck modifications and support for special analog structures.

Will also work closely with multiple tool vendors to deploy and maintain a stable tool environment as well as work with multiple foundries to setup the latest technology/library files. Experience setting up and supporting Synchronicity (or its equivalent) Cadence compatible revision control software is required.

Qualifications:UNIX and programming in PERL, csh, sh, awk, and sed.Support of Cadence DFII (cds446 & cds5141), Schematic, Layout, and programming in SKILL.Hspice and Verilog netlisting packages (Skill, Perl, csh, sh)Parameterized cells devices- (Skill)Mentor Calibre software (LVS, DRC, ERC)Company wide support for batch job system. (Perl, Tcl)Silicon Ensemble and other routing packages (knowledge of frame view, and ?.lib? files requirements is a plus Familiar with potential issues regarding future migration to OpenAccess.