ASIC Physical Design Engineer

Relevant experience with Physical design methodologies and Place and Route techniques required. ASIC design experience required. Physical Design (Magma), Static Timing Analysis (Synopsys PrimeTime) knowledge and tools experience is required. Experience in timing closure and signal integrity issues is highly desired. Knowledge of CMOS or CCD Image Sensors is also a plus. Perl and Tcl scripting language desired. Excellent verbal and written communication skills are essential. Strong interest and understanding of design methodologies is required. The ability to multiplex many issues, set priorities, and work in a team environment are essential for success in the position. BSEE or equivalent, required with 5+ years of experience, or MSEE, or equivalent with 3+ years of experience.

This position is in Thousand Oaks, California. A relocation service is available.

 

Altasens, Inc. is a newly formed commercial enterprise resulting from the spin-off of Rockwell Scientific?s CMOS Image Sensor (RSCIS) Business Group.

AltaSens, Inc. is leading the HD video market in the conversion from multi-chips power hungry CCDs to CMOS based imaging technology with our high integration power efficient system-on-chip camera solution.

If you are looking for an exciting opportunity to be a part of the next imaging revolution, apply now to become the next brilliant addition to our world renowned AltaSens team!

At AltaSens, you will get the opportunity to become a key contributor to our talented imaging chip design and development team.  Become empowered as we build the future of our vision together.

AltaSens offers a competitive salary with a comprehensive benefits package which includes Medical/Dental insurance, 401(k), vacation time.

 

To know us better, please visit our website www.altasens.com