Digital Design Engineer / MP892

Position Description: Digital design engineer responsible for RTL coding, simulation, synthesis, static timing, scan insertion, verification, integration of digital circuits into mixed-signal RF transceiver IC devices.

Qualifications:

Fluent in Verilog HDL
Proficient in design verification, chip synthesis, functional verification, static timing analysis
Skillful in timing closure and post-layout verification
Experienced in gate level simulation and formal verification
Good experience in developing verification test benches and test cases
Experienced with Test Compiler for scan insertion and TetraMax ATPG
Experienced using system simulation tools (e.g., Matlab)
Experienced using scripting tools (e.g., Perl)
Solid understanding of digital signal processing and digital communication techniques
Strong analytical, written, and oral communication skills and team oriented
Digital/mixed-signal IC design experience for wireless cellular applications is a plus
BS/MS with a minimum of 2 years of experience in digital circuit/ASIC design


Ref Code:?892