MTS CAD Design engr.

Position Description:

Work with microprocessor implementation design teams to architect, prototype, and develop design flows for high-performance circuits using RTL synthesis, timing-driven placement, design floor planning, design optimization, auto-place-routing, and static timing analysis tools. Candidate will work with the chip implementation teams to support the tools and flow for the RTL-GDS2 implementation process. Responsibilities include: working knowledge of RTL synthesis, timing constraint generation; static timing analysis and optimization; clock tree insertion; signal integrity analysis; power analysis.




Qualifications:

MSEE or MSCE preferred, BSEE or BSCE required and 6+ years experience desired.

Application of VLSI/ASIC design knowledge and software skills to develop leading edge design methodologies for microprocessor design teams at multiple design locations.