SOC Chip Lead

Position Description:

SPECIFIC JOB FUNCTIONS: Lead a team to tapeout a chip variant for a high-performance X86 microprocessor. Own Physical design & integration of some non-CORE blocks using a mix of semi-custom design techniques as well as synthesis/APR approaches. Experience with and working knowledge of modular design methodology. Working knowledge of ASIC flows and Synthesis/APR tools & optimization techniques and the ability to integrate these flows with semi-custom stdcell-based flows. Working knowledge of Front end design issues including IP verification considerations, design hierarchy, partitioning and connectivity. Knowledge of physical design: Experience with methodology definition and development, and tool scripting(C, perl) are desired. Knowledge of circuit issues/analysis is desired. Good working knowledge of timing, low power design techniques, electrical reliability analysis, knowledge of various circuit issues such as signal coupling/noise, IR, electromigration is desired. Experience in DFT desired. Manage cross-site teams.

PREFERRED EDUCATION AND EXPERIENCE: BS and 10+ years experience, MS and 7+ years experience, or Ph.D and 5+ years experience desired.

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Qualifications:

DESCRIPTION OF POSITION: SOC Project Lead: Engineer would lead the SOC/modular design effort for a particular variant of a high-performance x86 microprocessor. This involves leading a team to deliver on the tapeout of a chip variant, lead the physical design of a section of a high-performance X86 microprocessor including electrical and timing closure, coordinate the chip floorplan & integration effort, work with CAD team to improve timing-driven physical design methodology and continue evolving hierarchical SOC flows.