Debug Lab Failure Analyst (52097)

Department Description: Debug Lab, within the Wireless and Packaging Systems Laboratory (WPSL), located in Tempe, AZ. WPSL is part of FSL?s technology group, the Technology Solutions Organization. The Debug Lab serves two main functions: (a) quick turn-around circuit FIB editing for design change verification; and (b) debug / failure analysis of newly introduced devices or circuits having electrical performance problems. The circuit modifications typically support the design community in verifying proposed design fixes without having to cut new mask sets. Circuit debug is primarily targeted at new products that do not behave as expected, or have low yield in manufacturing.

 

Scope of Responsibilities/Expectations: This position within the Debug Lab involves performing failure analysis of new products using the host of tools within the lab, including photon emission microscopy, infrared imaging, XIVA (induced voltage alteration), SEM, manual probe stations and related parametric test equipment. The job involves debug analysis of circuits, typically in support of new wireless products, to determine root cause for electrical failures; parts may be in package or wafer form and failures are often related to design, device or process interactions.

 

Specific Knowledge/Skills: This is a hands-on, laboratory job that requires knowledge of semiconductor device, design and processing, as well as physical and electrical analysis techniques; previous experience with debug tools is a plus. Other desired skills include good communication (verbal and written), familiarity with various physical analysis techniques, understanding of circuit layouts and hands-on device experience in electrical characterization and solid analytical and problem solving skills. Minimum of BS degree in engineering, physics or related field plus 5 years relevant experience, or a MS or PhD degree with lesser experience.